1. Field of the Invention
The present invention relates to antifuse technology for use in integrated circuit structures. More particularly, the present invention relates to an antifuse having substantially reduced capacitance by forming a minimum size aperture in a semiconductor material for containing the antifuse dielectric, the aperture having a cross section less than the conventional minimum photolithographic feature size, and to a method for manufacturing such an antifuse.
2. The Prior Art
Integrated logic circuits which can be configured or programmed by the user for a specific application are becoming increasingly popular. These circuits are programmed by either selectively breaking or creating a series of programmable links. Programmable links are electrical interconnects which are broken or created as selected electronic nodes in the circuit by the user after the integrated circuit device has been fabricated and packaged. The programming process is used to connect together or to disconnect, respectively, selected electronic nodes such that a user-configurable integrated circuit may be programmed to perform a desired function.
Fusible links formerly were used extensively in PROM and other devices and are well known. A PROM device usually consists of an X-Y matrix or lattice of conductors or semiconductors. At each cross-over point of the lattice, a conducting link connects a transistor or other electronic node to the lattice network. The PROM device is programmed by providing a high programming current to predesignated fusible links which connect to selected nodes. Links are then blown out to create an open circuit. The combination of blown and unblown fusible links represents a digital bit pattern of ones and zeros signifying the logic configuration which the user wishes to store in the PROM device.
Fusible links present several disadvantages. First, significant amounts of current are needed for programming. Fusible link memory cells are also relatively large, thus presenting an inherent limitation on the size of a finished circuit containing large numbers of them. A fusible like cell must be disadvantageously large in order to accommodate the fusible link and an associated selection transistor which develops the high current needed to blow the link.
In order to overcome the foregoing disadvantages of fusible links, another type of programmable link, called an antifuse, has been developed for use in integrated circuit applications. Prior to programming, an antifuse is an open circuit. The programming mechanism for an antifuse creates a short circuit or a relatively low resistance connection between the circuit nodes to which it is connected. Antifuses consist typically conductor electrodes and/or semiconductor electrodes separated by some kind of dielectric or insulating material.
During programming, a current developed from a predetermined programming voltage applied to the electrodes of the selected antifuse causes the dielectric at a selected point between the electrodes to break down, thereby forming a conductive filament electrically connecting the electrodes and forming a short circuit or relatively low resistance link.
If performance of the circuit in which a plurality of antifuses is to be maximized, it is crucial to minimize the capacitance of unprogrammed antifuses. Each unprogrammed antifuse is essentially a capacitor, that is, two electrodes separated by a dielectric material. Therefore, a plurality of unprogrammed antifuses on a single line in the integrated circuit will act as a plurality of capacitors connected in parallel, wherein the capacitance of the line will be the sum of the capacitances of all unprogrammed antifuses. Accordingly, if the total capacitance of a plurality of unprogrammed antifuses in an electronic circuit is large enough, it will deleteriously affect circuit performance. It is therefore essential to minimize the capacitance of each antifuse element in order to insure proper device operation.
In the prior art, the minimum size of an antifuse has essentially been limited by the constraints of the conventional photolithographic process. The most effective way to substantially reduce capacitance in an antifuse element is to reduce the cross sectional area of the antifuse dielectric. In the prior art, the minimum size of an aperture for containing an antifuse dielectric can only be made as small as a conventional photolithographic feature size will allow.
An antifuse may be conventionally fabricated as an extension of a standard CMOS masking process by first forming an N+ diffusion region in a semiconductor substrate. The N+ region defines a first electrode. A silicon dioxide layer is then formed over the substrate and N+ region. In order to produce an aperture for the antifuse dielectric, an aperture is to be formed in the silicon dioxide layer over the N+ region. Using conventional photolithographic techniques, the aperture is patterned using a masking resist placed over the silicon dioxide. Next the silicon dioxide layer in the region of the aperture defined by the resist pattern is etched, using the resist layer as an etch mask. The image of the aperture in the resist is generally larger than the feature size on the glass masking plate due to lateral encroachment of the light during exposure of the mask. In addition, during etching, the undercutting of material by the etchant contributes to creating a larger sized aperture. Accordingly, in the prior art it was not possible to create an aperture for the antifuse dielectric having a size smaller than the minimum photolithographic feature size. The inability of the prior art to provide a method for forming an antifuse aperture smaller than the minimum photolithographic feature size is a significant constraint.
Because the filament created when an antifuse is programmed needs to be only a few hundred angstroms in diameter, an antifuse can theoretically be made smaller than will ever be possible using conventional photolithography. Accordingly, there is a great need for a method for making an aperture for an antifuse as small as possible. This would provide the advantage of potentially eliminating the parasitic capacitance of unprogrammed antifuses.
It is an object of the present invention to provide an electrically programmable low impedance antifuse element having a cross-sectional area smaller than is possible through conventional photolithographic techniques.
Another object of the present invention is to provide a method for making an antifuse having a minimum cross section smaller than that obtainable by conventional photolithographic process steps but which is manufacturable using available semiconductor processing techniques and available semiconductor process modules.